Portfolio 1
A FRENCH ANR PROJECT

Design Continuum for Next Generation Energy‐Efficient Compute Nodes

KEY INFORMATION
CONTINUUM is a project addressing the design of next generation energy-efficient high-performance embedded compute nodes. It focuses at the same time on software, architecture and emerging memory and communication technologies in order to synergistically exploit their corresponding feautures.

  • Period: 42 months from October 2015
  • Reference number: ANR-15-CE25-0007-01
  • Partners: Cortus, Inria-Rennes and LIRMM
  • Project coordinator: Abdoulaye Gamatié

NEWS

  1. July 2018: A Special Session on CONTINUUM topics during ReCoSoC Symposium - Join us!

  2. March 28/28, 2018: Next project F2F meeting in Montpellier (Cortus)

  3. July 2017: MAGPIE now available for download!

  4. June 27, 2017: MAGPIE tutorial at ComPAS'2017 (Sophia-Antipolis): see presented materials.

Future computing ecosystem

The coming decade will see the convergence of current numerical technologies, including embedded systems via IoT, high-performance and cloud computing, towards pervasive large-scale distributed virtualized systems. This trend will have a heavy impact on the way one will address upcoming scientific, industrial and societal problems.




Portfolio 3

Energy-efficiency, a major challenge

This ecosystem will come with a number of major challenges including security, reliability and energy-efficiency. This project addresses the latter by exploring a system design continuum, going seamlessly from software to emerging technologies via hardware architecture. Power saving opportunities exist at each of these levels, but real measurable gains will come from the synergistic focus on all these levels.


Portfolio 3

For a cross-disciplinary approach

A cross-disciplinary collaboration is promoted here between computer science and microelectronics, in order to achieve two main breakthroughs: i) combination of state-of-the-art heterogeneous adaptive embedded multicore architectures with emerging communication and memory technologies and, ii) power-aware dynamic compilation techniques that suitably match such architectures.


Portfolio 3

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Funding agency



Portfolio 6

Involved partners